Method for producing bonding wafer

ABSTRACT

The present invention provides a method for producing a bonded wafer by the ion implantation delamination method comprising at least a step of bonding a bond wafer having a micro bubble layer formed by gaseous ion implantation and a base wafer serving as a support substrate and a step of delaminating the bond wafer at the micro bubble layer as a border to form a thin film on the base wafer, wherein, after the delamination of the bond wafer, the bonded wafer is subjected to a heat treatment in an atmosphere of an inert gas, hydrogen or a mixed gas thereof, then the bonded wafer is subjected to thermal oxidation to form a thermal oxide film on the surface of the thin film, and then the thermal oxide film is removed to reduce thickness of the thin film. Thus, there is provided a method for producing a bonded wafer, which can surely remove damages or defects on a surface of a wafer produced by the ion implantation delamination method while maintaining the thickness uniformity of the bonded wafer, and which can also be sufficiently used as a technique for large scale production.

TECHNICAL FIELD

[0001] The present invention relates to a method for producing a bondedwafer utilizing the ion implantation delamination method, in particular,a method for producing an SOI wafer by bonding a silicon wafer implantedwith hydrogen ions or the like to another wafer serving as a supportsubstrate and then delaminating the wafer.

BACKGROUND ART

[0002] Recently, as a method for producing an SOI wafer, the methodcomprising bonding a wafer implanted with hydrogen ions or the like andthen delaminating the wafer to produce an SOI wafer (a technique calledion implantation delamination method: Smart Cut Method (registeredtrademark)) is newly coming to attract much attention. This method is atechnique for producing an SOI wafer, wherein an oxide film is formed onat least one of two silicon wafers, gaseous ions such as hydrogen ionsor rare gas ions are implanted into one wafer (bond wafer) from its topsurface to form a micro bubble layer (enclosed layer) in this siliconwafer, then the ion-implanted surface of the wafer is bonded to theother silicon wafer (base wafer) via the oxide film, thereafter thewafers were subjected to a heat treatment (delamination heat treatment)to delaminate one of the wafers (bond wafer) as a thin film at the microbubble layer as a cleavage plane, and the bonded wafer is furthersubjected to a heat treatment (bonding heat treatment) for firm bondingto obtain an SOI wafer (refer to Japanese Patent Laid-open (Kokai)Publication No. 5-211128). In this method, the cleavage plane(delaminated plane) is obtained as a good mirror surface, and an SOIwafer also having high uniformity of the thickness of the SOI layer iscomparatively easily obtained.

[0003] However, when an SOI wafer is produced by the ion implantationdelamination method, a damaged layer remains on the surface of SOI waferafter delamination due to the ion implantation, and the surface hashigher surface roughness compared with mirror surfaces of silicon wafersof usual product level. Therefore, it becomes necessary to remove such adamaged layer and roughening of the surface in the ion implantationdelamination method. Conventionally, in order to remove the damagedlayer and so forth, mirror polishing using a small amount of stockremoval for polishing (stock removal: about 100 nm), which is calledtouch polish, has been performed in a final step after the bonding heattreatment.

[0004] However, if the SOI layer is subjected to polishing involving amechanical processing factor, there is caused a problem that uniformityof the SOI layer thickness attained by implantation of hydrogen ions orthe like and the delamination is degraded, because the stock removal forpolishing is not uniform.

[0005] Therefore, Japanese Patent Laid-open (Kokai) Publication No.10-242154 proposed a method for improving the surface roughness bysubjecting an SOI wafer obtained by the ion implantation delaminationmethod to a heat treatment in an active atmosphere (hydrogen atmosphere)without polishing the surface of the SOI wafer. It is described that,according to this method, the surface roughness of the SOI layer surfacecan be improved while maintaining the uniformity of film thickness ofthe SOI layer.

[0006] However, damages resulting from the ion implantation exist in anSOI wafer obtained by the ion implantation delamination method, and thedamages in the SOI layer are large at the surface side and becomesmaller at a deeper position in the layer. Therefore, if the wafer issubjected to such a heat treatment in an active atmosphere as describedabove, recovery of the damages advances from interior of the SOI layerto the surface side. However, when the damages at the surface side arelarge, a heat treatment at a high temperature for a long period of timeis required, and in addition, complete recovery may not be obtained evenif a heat treatment is performed at a high temperature for a long periodof time, as the case may be.

[0007] Since the strength and depth of the damages are influenced by theamount of implantation energy and dose of gaseous ions such as hydrogenions, for example, when the implantation energy needs to be increased asin the case of producing an SOI wafer having a thick SOI layer or athick buried oxide layer, or when the dose needs to be increased for thepurpose of performing the delamination heat treatment at a lowtemperature, the aforementioned problem becomes remarkable.

[0008] Furthermore, if the wafer is subjected to a heat treatment at ahigh temperature for a long period of time under a reducing atmospherecomprising hydrogen gas, silicon at the SOI layer surface may be etched,thus thickness uniformity may be degraded, and etch pits may be formedin a buried oxide layer. This phenomenon is caused by the reasondescribed below. That is, defects such as COPs (Crystal OriginatedParticles) exist in the SOI layer, and if they are connected to theoxide film as the under layer, COPs do not disappear and remain as theyare, or they are even enlarged. Therefore, hydrogen or the like thatpenetrates through the defects also etches the buried oxide layer, andthus pits are formed there to cause the aforementioned phenomenon. Theseetch pits are problematic, since they influence also on the SOI layerneighboring the pits.

[0009] As described above, although various methods have been proposedin order to remove the damaged layer and roughening of the surface ofSOI wafer obtained by the ion implantation delamination method whilemaintaining the thickness uniformity of SOI layer, there are nosatisfactory method so far, and a suitable solution method has beendesired.

[0010] Therefore, as described in Japanese Patent Laid-open (Kokai)Publication No. 2000-124092, the applicants of the present inventionproposed, as a method for producing an SOI wafer of high quality byremoving the damaged layer and the roughening of the surface remainingon a surface of SOI layer after the delamination in the ion implantationdelamination method while maintaining the thickness uniformity of theSOI layer, a method of forming an oxide film by a heat treatment underan oxidizing atmosphere on the SOI surface after delamination, thenremoving the oxide film, and subsequently subjecting the wafer to a heattreatment under a reducing atmosphere.

[0011] If the so-called sacrificial oxidation is performed, in which anoxide film is formed on the SOI layer by a heat treatment under anoxidizing atmosphere, and then the oxide film is removed, a part of orwhole damaged layer on the SOI layer surface can be incorporated intothe oxide film, and therefore the damaged layer can efficiently beremoved by removing the oxide film. Further, a heat treatment can besubsequently performed under a reducing atmosphere to recover thedamaged layer remaining in the SOI layer and improve the surfaceroughness, and the heat treatment time of the heat treatment under areducing atmosphere can also be shortened, since a part of or wholedamaged layer on the SOI layer surface has been removed by thesacrificial oxidation. Furthermore, this method does not requirepolishing or the like involving a mechanical processing factor,uniformity of the film thickness of the SOI layer is not degraded, andthus it is considered that an SOI wafer of extremely high quality can beproduced by the ion implantation delamination method with higherproductivity.

[0012] As described above, the technique described in Japanese PatentPublication (Kokai) Laid-open No. 2000-124092 has the advantage that thedamaged layer and the roughening of the surface remaining on the SOIlayer surface after the delamination can be removed in the ionimplantation delamination method while maintaining the thicknessuniformity of the SOI layer. However, when the inventors of the presentinvention performed additional experiments for this technique, it wasfound that the technique had the following drawbacks and thus thetechnique was insufficient as it was as a method for production in alarge scale.

[0013] 1) Since the sacrificial oxidation in the aforementionedtechnique directly oxidizes the delaminated plane obtained by the ionimplantation, oxidation induced stacking faults (OSFs) may be generatedby the oxidation, and these OSFs may not be completely removed only bythe subsequent heat treatment under a reducing atmosphere.

[0014] 2) Surface roughness sufficiently removed by the heat treatmentunder a reducing atmosphere mainly consists only of short periodcomponents (e.g., period of 1 μm or less), and removal of long periodcomponents (e.g., period of about 1 to 10 μm) of the surface roughnessmay become insufficient.

[0015] 3) If the high temperature heat treatment is performed under anatmosphere containing a large amount of hydrogen gas as the reducingatmosphere, the hydrogen gas acts on the bonding interface, and thuscorrosion of the interface may become significant and thus it may causeparticle generation in the device production process.

DISCLOSURE OF THE INVENTION

[0016] The present invention was accomplished in order to solve theaforementioned problems, and its object is to provide a method forproducing a bonded wafer, which can surely remove damages or defects ona surface of a wafer produced by the ion implantation delaminationmethod and sufficiently flatten the surface roughness while maintainingthe thickness uniformity of the bonded wafer, and which can also besufficiently used as a technique for large scale production.

[0017] In order to achieve the aforementioned object, the presentinvention provides a method for producing a bonded wafer by the ionimplantation delamination method comprising at least a step of bonding abond wafer having a micro bubble layer formed by gaseous ionimplantation and a base wafer serving as a support substrate and a stepof delaminating the bond wafer at the micro bubble layer as a border toform a thin film on the base wafer, wherein, after the delamination ofthe bond wafer, the bonded wafer is subjected to a heat treatment in anatmosphere of an inert gas, hydrogen or a mixed gas thereof, then thebonded wafer is subjected to thermal oxidation to form a thermal oxidefilm on the surface of the thin film, and then the thermal oxide film isremoved to reduce thickness of the thin film.

[0018] If the delaminated plane of the thin film after the delaminationstep is subjected to a heat treatment under an atmosphere of an inertgas, hydrogen gas or a mixed gas thereof to perform a surface flatteningtreatment and removal of damages, and then the oxidation and the removalof the oxide film are performed as described above, uniformity of thefilm thickness can be maintained, and generation of OSFs due to theoxidation can also surely be avoided.

[0019] In the aforementioned method, after the heat treatment under anatmosphere of an inert gas, hydrogen gas or a mixed gas thereof, thesurface of the thin film can be polished for a stock removal of 70 nm orless, and then the thermal oxidation can be performed.

[0020] If the surface is slightly polished (stock removal of 70 nm orless, especially 50 nm or less) after the heat treatment under anatmosphere of an inert gas, hydrogen gas or a mixed gas thereof, thelong period components of surface roughness can be improved.

[0021] That is, although the short period components of surfaceroughness are fully removed by the heat treatment under an atmosphere ofan inert gas, hydrogen gas or a mixed gas thereof, long periodcomponents may remain, and therefore they are removed by polishing. Ifthe heat treatment is once performed as described above, the surfaceroughness and damages of the surface are improved, and therefore thestock removal for polishing can be reduced compared with thatconventionally used, and in particular, it may be reduced to a half orless of the conventionally used stock removal. Thus, the long periodcomponents of surface roughness can surely be removed while theinfluence on uniformity of film thickness is minimized.

[0022] Further, the heat treatment under an atmosphere of an inert gas,hydrogen gas or a mixed gas thereof is preferably performed under a 100%argon atmosphere or an argon atmosphere containing hydrogen in an amountbelow explosion limit.

[0023] Such an atmosphere enables improvement of surface roughness anddamages of the surface while suppressing corrosion of the bondinginterface.

[0024] Further, in the present invention, a silicon single crystal waferis preferably used as the bond wafer.

[0025] If a silicon single crystal wafer, which enables production ofwafers having high quality and large diameter, is used as the bondwafer, gaseous ions are implanted into it, and it is delaminated, abonded wafer having a silicon single crystal thin film of high qualityand a large diameter can be produced at a low cost.

[0026] Moreover, the bonded wafer produced by the method of the presentinvention can be a bonded wafer having a thin film of high qualityshowing high uniformity of film thickness and being free from rougheningof the surface and surface damages.

[0027] For example, there can be provided a bonded SOI wafer produced bybonding two of silicon wafers via an oxide film, wherein surfaceroughness (RMS) measured for a 1 μm square and 10 μm square of the SOIlayer surface is 0.15 nm or less for the both squares, and σ of thethickness of the SOI layer is 1.5 nm or less.

[0028] As explained above, according to the present invention, thedamaged layer and surface roughness remaining on the surface of thedelaminated thin film in the ion implantation delamination method cansurely be removed while maintaining the uniformity of film thickness ofthe thin film. Therefore, a bonded wafer of extremely high quality canbe produced with high productivity, and thus it is a method forproducing a bonded wafer extremely suitable as a technique for largescale production.

BRIEF EXPLANATION OF THE DRAWING

[0029]FIG. 1(a) to (i) show a flow diagram of an exemplary process forproducing an SOI wafer by the ion implantation delamination methodaccording to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

[0030] Hereafter, embodiments of the present invention will be explainedwith reference to the appended drawings. However, the present inventionis not limited to these.

[0031]FIG. 1 shows a flow diagram of an exemplary process for producingan SOI wafer by the ion implantation delamination method according tothe present invention.

[0032] The present invention will be explained hereafter by exemplifyinga case where two of silicon wafers are bonded.

[0033] In the ion implantation delamination method shown in FIG. 1, twomirror-surface silicon wafers are prepared first in the step (a). Thatis, a base wafer 1 that serves as a support substrate and a bond wafer 2from which an SOI layer is obtained, which correspond to specificationsof devices, are prepared.

[0034] Then, in the step (b), at least one of the wafers, the bond wafer2 in this case, is subjected to thermal oxidation to form an oxide film3 having a thickness of about 0.1 to 2.0 μm on its surface.

[0035] In the step (c), gaseous ions such as hydrogen ions or rare gasions, hydrogen ions in this case, are implanted into one surface of thebond wafer 2 on which the oxide film was formed to form a micro bubblelayer (enclosed layer) 4 parallel to the surface in mean penetratingdepth of the ions.

[0036] The step (d) is a step of superimposing the base wafer 1 on thehydrogen ion implanted surface of the hydrogen ion implanted bond wafer2 via an oxide film and bonding them. Usually, by contacting thesurfaces of two of the wafers to each other in a clean atmosphere at anordinary temperature, the wafers are adhered to each other without usingan adhesive or the like.

[0037] The subsequent step (e) is a delamination heat treatment step inwhich the wafers were delaminated at the enclosed layer 4 as a border toseparate them into a delaminated wafer 5 and an SOT wafer 6 (SOT layer7+buried oxide layer 3+base wafer 1). For example, if the wafers aresubjected to a heat treatment at a temperature of about 400° C. to 600°C. under an inert gas atmosphere, the wafers are separated into thedelaminated wafer 5 and the SOT wafer 6 due to rearrangement of crystalsand aggregation of bubbles in the enclosed layer. On the SOT layer 7 atthe surface of the SOI wafer as it is after the delamination, a damagedlayer 8 remains.

[0038] Further, ions to be implanted such as hydrogen ions can beexcited and implanted in a state of plasma, or bonding surfaces can bepreliminarily subjected to a treatment with nitrogen, oxygen, hydrogenplasma or the like so as to be activated and bonded, as the result thedelamination heat treatment can be omitted.

[0039] After this delamination step, the bonding heat treatment isperformed in the step (f). In this step, the SOI wafer 6 is subjected toa heat treatment at a high temperature as a bonding heat treatment toobtain sufficient bonding strength, since the bonding strength of thewafers brought into close contact in the aforementioned bonding step andthe delamination heat treatment step in the steps (d) and (e) as it iswould be weak for use in the device production process. This heattreatment is preferably performed, for example, under an atmosphere ofinert gas at 1000° C. to 1300° C. for 30 minutes to 2 hours. As for thesteps thus far, the method of the present invention is the same as theconventional ion implantation delamination method.

[0040] However, in the method of the present invention, this bondingheat treatment may be omitted, and the heat treatment in the followingstep under an atmosphere of an inert gas, hydrogen gas or a mixed gasthereof can be used also as the bonding heat treatment (refer to FIG. 1,f′). Thus, the steps can be further simplified compared with theconventional method of removing the roughening of the surface or surfacedamages.

[0041] Then, in the step (g), the SOI wafer after the bonding heattreatment step (f) (or after the delamination step (e) when the bondingheat treatment is omitted) is subjected to a heat treatment under aninert gas, hydrogen gas or a mixed gas thereof using a usual heattreatment furnace in which heating is attained by a heater (batchfurnace) to improve surface roughness and remove damages on the SOIsurface. The heat treatment temperature is suitably 1100° C. to 1350° C.When it is lower than 1100° C., a long period of time is required toimprove the surface roughness. On the other hand, a temperatureexceeding 1350° C. may cause a problem concerning contamination withheavy metal impurities or durability of the heat treatment furnace.Further, although the heat treatment time depends also on the heattreatment temperature, it is suitably in the range of 10 minutes to 8hours. The heat treatment for a period shorter than that may provideinsufficient improvement of the surface roughness, and the heattreatment for a period longer than that decreases the productivity. Whenthe aforementioned heat treatment is performed by using an RTA (RapidThermal Annealing) apparatus, the heat treatment temperature ispreferably 1200° C. or higher, and the heat treatment time is preferably1 to 120 seconds. Moreover, these heat treatment using a batch furnaceand heat treatment using an RTA apparatus can also be performed incombination.

[0042] The heat treatment atmosphere may consist of an inert gas,hydrogen gas or a mixed gas thereof. However, if the content of hydrogengas is high, the aforementioned corrosion of the bonding interfacebecomes likely to be generated, and slip dislocations become likely tobe generated by the heat treatment. Therefore, the hydrogen gas contentis preferably 25% or less. The hydrogen gas content is more preferably,lower than the explosion limit (4%) in view of safety. Although argongas, which is most inexpensive and shows high versatility, is suitableas the inert gas, helium or the like may also be used.

[0043] As described above, in the present invention, a sacrificial oxidefilm is not directly formed on the delaminated plane, but the surfaceroughness and the damages of the surface are improved by firstperforming the heat treatment of the step (g) without generating OSFs inthe thin film and without degrading the thickness uniformity.

[0044] Then, since damages on the SOI surface cannot be sufficientlyremoved only by the heat treatment of the step (g) in many cases,damages on the SOI surface are taken into an oxide film by the thermaloxidation in the step (h), and thickness of the thermal oxide film to beformed is controlled at the same time so that thickness of the obtainedSOI layer should become a desired thickness. If the thickness of the SOIlayer is reduced by the thermal oxidation, a thinner film can beobtained substantially without degrading thickness uniformity.

[0045] Further, if the thermal oxide film is removed by using, forexample, an aqueous solution containing HF in the step (i), an SOI waferhaving an SOI layer of the desired thickness is formed.

[0046] Thus, an SOI wafer having an SOI layer with a desired thicknesscan be obtained, in which the roughening of the surface and damages ofthe surface are surely removed while thickness uniformity is maintained

[0047] In addition, after the heat treatment in the step (g) and beforethe thermal oxidation step (h), a polishing step using a stock removalof 70 nm or less, especially 50 nm or less, may be added as required(refer to FIG. 1, g′). By adding this polishing step, long periodcomponents of the surface roughness, which cannot be removed by the heattreatment of the step (g), can be surely removed. Further, since thestock removal is limited to 70 nm or less, especially 50 nm or less, itis smaller than the stock removal conventionally used (about 100 nm ormore), and it can be reduced to, for example, a half or less of theconventionally used stock removal. Thus, degradation of thicknessuniformity of the SOI layer can be markedly suppressed.

[0048] Hereafter, explanations will be specifically made with referenceto examples of the present invention and comparative examples. However,the present invention is not limited to these.

EXAMPLES 1 To 4 AND COMPARATIVE EXAMPLES 1 TO 3

[0049] A silicon single crystal ingot produced by the Czochralski methodand having a crystal orientation of <100>, conductivity type of p-typeand a resistivity of 20 Ω·cm was sliced and processed to prepare mirrorsurface silicon wafers having a diameter of 200 mm. These were dividedinto bond wafers and base wafers, and SOI wafers were produced by theion implantation delamination method of the present invention accordingto the steps represented in FIG. 1, (a) to (i).

[0050] First, according to FIG. 1(a) to (e), a bond wafer 2 wasdelaminated to obtain an SOI wafer 6. At this time, thickness of aburied oxide layer 3 was 400 nm, and the other major conditions such asthose for ion implantation were as follows.

[0051] 1) Ion implantation conditions: H+ ions, implantation energy: 90keV, implantation dose: 6.5×10¹⁶/cm²

[0052] 2) Delamination heat treatment conditions: under N₂ gasatmosphere, 500° C., 30 minutes

[0053] Thus, the SOI wafer 6 having an SOI layer 7 with a thickness of437 nm could be obtained. When surface roughness of the surface(delaminated surface) of the SOI wafer 6 as delaminated shown in FIG.1(e) was measured for a 1 μm square by the atomic force microscopemethod, it was found to be 6.7 nm in average in terms of the RMS value(root-mean-square roughness value). This value is 10 times or more of avalue for surface roughness of usual mirror-polished silicon singlecrystal wafers, and it can be seen that the surface of the SOI layer asdelaminated has significant local roughening of the surface (shortperiod components). Moreover, the RMS value for a 10 μm square, whichserves as an index of long period components, was also large, i.e., aslarge as 5.5 nm in average.

[0054] Each SOI wafer immediately after the delamination steps (e) wasused and processed according to the processing flows shown in Tables 1and 2. Surface roughness (RMS), thickness uniformity (average: t,standard deviation: σ) and defect density of the SOI layer of eachobtained bonded wafer were measured. Treatment conditions andmeasurement conditions are shown in Table 3. TABLE 1 ComparativeComparative Example 1 Example 2 Example 1 Example 2 Processing Nobonding Bonding heat No bonding Bonding heat flow heat treatment heattreatment treatment ↓ treatment ↓ ↓ Ar annealing ↓ Sacrificial Arannealing ↓ Ar annealing oxidation ↓ Polishing ↓ Sacrificial for 40 nmRemoval of oxidation ↓ oxide film ↓ Sacrificial ↓ Removal of oxidationAr annealing oxide film ↓ Removal of oxide film

[0055] TABLE 2 Comparative Example 3 Example 4 Example 3 ProcessingBonding heat Bonding heat Bonding heat flow treatment treatmenttreatment ↓ ↓ ↓ Ar annealing Ar annealing Polishing for ↓ ↓ 100 nmPolishing for Polishing for 55 nm 70 nm ↓ ↓ Sacrificial Sacrificialoxidation oxidation ↓ ↓ Removal of Removal of oxide film oxide film

[0056] TABLE 3 Treatment conditions and measurement conditions (Bondingheat treatment) 1100° C., 120 minutes (100% N₂ atmosphere) (Arannealing) 1200° C., 60 minutes (100% Ar atmosphere) (Sacrificialoxidation) 950° C., pyrogenic oxidation, oxide film thickness: 590 nm(Example 1), 500 nm (Example 2) , 465 nm (Example 3) , 435 nm (Example4) , 590 nm (Comparative Example 2) (Removal of oxide film) Etching with5% hydrofluoric acid (Surface roughness measurement) AFM produced byVeeco, RMS measurement for 1 μm square and 10 μm square (Thicknessdistribution measurement) AcuMap 2 produced by ADE, measured for 1765points in a plane (Defect measurement) Diluted Secco etching until SOIlayer thickness becomes 30 nm → Etching with hydrofluoric acid →Observation with optical microscope

[0057] Hereafter, the defect measurement method for the SOI layer willbe explained briefly.

[0058] In a case of thin film SOI as in the present invention, if theSecco etching solution (mixture of dichromic acid, hydrofluoric acid andwater), which is used for the preferential etching of usual siliconwafers, is used, the etching rate becomes unduly high, and the SOI layeris removed by the etching for a short period of time. Therefore, it isnot suitable for evaluation of defects.

[0059] Therefore, the etching is performed by using the Secco etchingsolution diluted with pure water so as to reduce the etching rate untilthe thickness of the SOI layer becomes a predetermined thickness. Bythis etching, defect portions in the SOI layer become micro pitspenetrating the SOI layer. Since it is difficult to observe these micropits as they are, the buried oxide layer is etched through the micropits by immersing the wafer in hydrofluoric acid to visualize the defectportions. Thus, the defect portions can be easily observed from thesurface of the thin film SOI layer by using a optical microscope.

[0060] In these examples and comparative examples, a commerciallyavailable usual Secco etching solution was diluted twice and used, andthe diluted Secco etching was terminated when the thickness of theremaining SOI layer became about 30 nm. Then, the wafer was immersed in25 weight % hydrofluoric acid for 90 seconds, and defect density wasmeasured by observing the pits formed in the buried oxide layer by usinga optical microscope of 100 magnifications.

[0061] The measurement results are shown in Tables 4 and 5. TABLE 4Thickness RMS (nm) distribution Defect 1 μm 10 μm (nm) density squaresquare Average t σ (number/cm²) Example 1 0.08 0.29 171.5 0.2 1 × 10²Example 2 0.06 0.16 172.4 1.0 1 × 10² Comparative 0.10 0.28 437.0 0.2 5× 10⁵ Example 1 Comparative 0.11 0.30 171.5 0.2 2 × 10⁴ Example 2

[0062] TABLE 5 Thickness RMS (nm) distribution Defect 1 μm 10 μm (nm)density square square Average t σ (number/cm²) Example 3 0.08 0.15 172.51.4 1 × 10² Example 4 0.09 0.14 171.5 1.5 1 × 10² Comparative 0.10 0.13437.0 2.0 5 × 10² Example 3

[0063] From the results shown in Tables 4 and 5, it can be seen that,for sufficiently removing roughening of the surface and damages on thesurface resulting from ion implantation and forming an SOI layer havingfew defects, the production method of the present invention used forExamples 1 to 4 is suitable. Moreover, in Example 1, removal of adelaminated surface by polishing is not performed at all, and thereforeextremely superior thickness uniformity was obtained. Long periodcomponents of the surface roughness was improved by 10 times or morecompared with those immediately after the delamination, although theyare slightly inferior compared with Examples 2 to 4 where polishing wasperformed for 70 nm or less. Moreover, in Examples 2 to 4, although alittle degradation of the thickness uniformity was observed due to theinfluence of polishing, σ was still maintained at a high level of 1.0 to1.5 nm. Furthermore, extremely high quality was obtained for surfaceroughness for both of the short period components and long periodcomponents.

[0064] On the other hand, it can be seen that, if the Ar annealing alonewas used as in Comparative Example 1, the defect density becomesmarkedly high, and surface damages cannot be completely removed.Further, it can be seen that, as in Comparative Example 2, although theeffect of defect reduction was obtained by performing the sacrificialoxidation before the Ar annealing, the defect density became highercompared with Examples 1 to 4 due to the generation of OSFs in theoxidation step. Moreover, if the polishing alone was used as inComparative Example 3, the defect density became markedly high, and inaddition, the thickness uniformity was bad because the polishing wasperformed for no less than 100 nm.

[0065] Thus, it can be seen that, according to the present invention,there can be produced, for example, a bonded SOI wherein surfaceroughness (RMS) measured for a 1 um square and 10 μm square of the SOIlayer surface is 0.15 nm or less for the both squares, σ of thethickness of the SOI layer is 1.5 nm or less, and moreover defectdensity is less than 10³ number/cm².

[0066] Furthermore, although 100% Ar atmosphere was used as theatmosphere for the heat treatment for improving the surface roughness inthe aforementioned examples, when the experiments were performed byusing an argon atmosphere containing 3% hydrogen gas instead of theabove atmosphere, results substantially similar to those mentioned abovewere obtained. Further, in the heat treatment under 100% Ar atmospherein Examples 1 to 4 and the heat treatment utilizing the argon atmospherecontaining 3% hydrogen gas instead of that, such corrosion of thebonding interface as seen in a heat treatment under an atmospherecontaining a large amount of hydrogen such as 100% hydrogen atmospherewas not observed.

[0067] The present invention is not limited to the embodiments describedabove. The above-described embodiments are mere examples, and thosehaving the substantially same configuration as that described in theappended claims and providing the similar functions and advantages areincluded in the scope of the present invention.

[0068] For example, while the present invention was explained abovemainly for the cases of bonding two of silicon wafers to produce SOIwafers, the present invention is not limited to those, and of course itcan also be applied to a case where an ion-implanted silicon wafer isbonded to an insulator wafer and delaminated to produce an SOI wafer,and a case where a compound semiconductor wafer such as GaAs wafer isused as a wafer to be implanted with ions.

[0069] Further, the production steps for producing the bonded waferaccording to the present invention are not limited to those mentioned inFIG. 1. Other steps such as cleaning and heat treatment may be added,and the steps are used with suitable modification including alterationof the order of the steps, omission of some steps and so forth dependingon the purpose.

1. A method for producing a bonded wafer by the ion implantationdelamination method comprising at least a step of bonding a bond waferhaving a micro bubble layer formed by gaseous ion implantation and abase wafer serving as a support substrate and a step of delaminating thebond wafer at the micro bubble layer as a border to form a thin film onthe base wafer, wherein, after the delamination of the bond wafer, thebonded wafer is subjected to a heat treatment in an atmosphere of aninert gas, hydrogen or a mixed gas thereof, then the bonded wafer issubjected to thermal oxidation to form a thermal oxide film on thesurface of the thin film, and then the thermal oxide film is removed toreduce thickness of the thin film.
 2. The method for producing a bondedwafer according to claim 1, wherein, after the heat treatment under anatmosphere of an inert gas, hydrogen gas or a mixed gas thereof, thesurface of the thin film is polished for a stock removal of 70 nm orless, and then the thermal oxidation is performed.
 3. The method forproducing a bonded wafer according to claim 1 or 2, wherein the heattreatment under an atmosphere of an inert gas, hydrogen gas or a mixedgas thereof is performed under a 100% argon atmosphere or an argonatmosphere containing hydrogen in an amount below explosion limit. 4.The method for producing a bonded wafer according to any one of claims 1to 3, wherein a silicon single crystal wafer is used as the bond wafer.5. A bonded wafer produced by the method according to any one of claims1 to
 4. 6. A bonded SOI wafer produced by bonding two of silicon wafersvia an oxide film, wherein surface roughness (RMS) measured for a 1 μmsquare and 10 μm square of the SOI layer surface is 0.15 nm or less forthe both squares, and a of the thickness of the SOI layer is 1.5 nm orless.